/*******************************************************************/ /* i-8084W driver head file */ /* Version:0x505 */ /* Fix bug: pac_i8084W_ClrCnt for up/down, AP phase, dir/pulse */ /* Bug Description: can not clear counter for B channel signal */ /* Current Version:0x60001 */ /* Fix bug:pac_i8084W_InitDriver will cause */ /* Frequency Timeout setting =0, Frequency Timeout default=1000*/ /* When Frequency Timeout 0,it will usually read Frequency= 0 */ /*******************************************************************/ #define OK 0 #define ID_ERROR -1 #define SLOT_OUT_RANGE -2 #define CHANNEL_OUT_RANGE -3 #define SELECT_CHANNEL_ERROR -4 #define ADDRESS_ERROR -5 #define MODE_ERROR -6 #define DATA_ERROR -10 #define Timeout -15 #ifdef _8084W_EXPORTS #define I8084W_API __declspec(dllexport) #else #define I8084W_API __declspec(dllimport) #endif #ifdef __cplusplus // for C++ compile use extern "C" { #endif /* __cplusplus */ #define pac_i8084W_ReadFreqInFloat pac_i8084W_ReadFreq_Float #define pac_i8084W_ReadLowPassFilterUs pac_i8084W_ReadLowPassFilter_Us #define pac_i8084W_SetLowPassFilterUs pac_i8084W_SetLowPassFilter_Us #define pac_i8084W_ReadLowPassFilterStatus pac_i8084W_ReadLowPassFilter_Status #define pac_i8084W_SetLowPassFilterStatus pac_i8084W_SetLowPassFilter_Status #define pac_i8084W_ReadDIXor pac_i8084W_ReadDI_Xor #define pac_i8084W_ReadDIXorLPF pac_i8084W_ReadDI_XorLPF #define pac_i8084W_ClrAllCnt pac_i8084W_ClrCnt_All I8084W_API short pac_i8084W_GetFirmwareVersion(int slot, short* ver); I8084W_API int pac_i8084W_GetLibVersion(void); //Get the version number of i8084 library (Hex) Rev:1.0.00 I8084W_API void pac_i8084W_GetLibDate(char* LibDate); // Get the date of 8084 library ,Sep 03 2003 I8084W_API int pac_i8084W_InitDriver(int Slot); /* Configure the 8084 with the setting stored in the EEPROM. If there is no settings stored in the EEPROM, the function will call i8084W_RecoverDefaultSetting. Slot: 0~7 return: 0 --> OK -1 --> Module not found >0 --> Some Pulse/Dir counters have one count offset (+1) Bit0=1 ==> A0 has one count offset (+1) Bit2=1 ==> A1 has one count offset (+1) Bit4=1 ==> A2 has one count offset (+1) Bit6=1 ==> A3 has one count offset (+1) (due to the input channel is high) */ // Counter Mode definitions // 0: Dir/Pulse Counter // 1: Up/Down Counter // 2: Frequency // 3: Up Counter I8084W_API int pac_i8084W_SetChannelMode(int Slot, int Channel, int Mode); /* Slot: 0~7 Channel: 0~7 Mode: 0 --> Dir/Pulse Counter 1 --> Up/Down Counter 2 --> Frequency 3 --> Up Counter return: 0 ==> No error 1 ==> The Pulse/Dir counter has one count offset (+1) (due to the input channel is high) */ I8084W_API int pac_i8084W_ReadCntABPhase(int Slot, int Channel,long *Cnt32U,int *Overflow); I8084W_API int pac_i8084W_ReadCntPulseDir(int Slot, int Channel,long *Cnt32U,int *Overflow); /* Read Pulse/Dir Counter Slot: 0~7 Channel: 0~7 Cnt32L = 32-bit UpDown Counter = Bit31=0 --> Up Count (count >0) = Bit31=1 --> Down Count (count <0) Overflow=number of overflow Total count = over * 0x80000000 + count ExampleA: over=1 , count=16384, total count = (1)*0x80000000 +16384 = 2147500032 ExampleB: over=-1 , count=-8192, total count = (-1)*0x80000000 -8192 = -2147491840 */ I8084W_API int pac_i8084W_ReadCntUpDown(int Slot, int Channel,long *Cnt32U,int *Overflow); /* Read UpDown Counter Slot: 0~7 Channel: 0~7 Cnt32L = 32-bit UpDown Counter = Bit31=0 --> Up Count (count >0) = Bit31=1 --> Down Count (count <0) Overflow=number of overflow Total count = over * 0x80000000 + count ExampleA: over=1 , count=16384, total count = (1)*0x80000000 +16384 = 2147500032 ExampleB: over=-1 , count=-8192, total count = (-1)*0x80000000 -8192 = -2147491840 */ I8084W_API int pac_i8084W_ReadFreq_Float(int Slot, int Channel, float *Freq); I8084W_API int pac_i8084W_ReadFreq(int Slot, int Channel, unsigned long *Freq); /* Slot: 0~7 Channel: 0~7 Freq: unit=Hz */ I8084W_API int pac_i8084W_ReadCntUp(int Slot, int Channel, unsigned long *Cnt32U, unsigned int *OverFlow); /* Read Up Counter Slot: 0~7 Channel: 0~7 --> 0=A0, 1=B0, ...,6=A3,7=B3 Cnt32U = 32-bit Up Counter Overflow=number of Overflow Total count = over * 0x100000000 + count ExampleA: over=1 , count=16384, total count = (1)*0x100000000 +16384 = 4294983680 */ I8084W_API int pac_i8084W_ClrCnt(int Slot, int Channel); /* Clear Counter Slot: 0~7 Channel: 0~7 return: 0 ==> No error 1 ==> The Pulse/Dir counter has one count offset (+1). It is due to the pulse channel is high. The correct initial situation is: pulse channel is low or open dir signal is high or low. */ I8084W_API int pac_i8084W_ClrCnt_All(int Slot); //=================================================================== //==== Functions to configure 8084 ================================== //=================================================================== I8084W_API void pac_i8084W_RecoverDefaultSetting(int Slot); /* Slot = 0~7 Default settings: XOR register=0 Channel mode= 3 (Up counter mode) Frequency operate mode = 0 (Auto mode) Frequency update time: Auto mode =330 ms Low freq mode = 1000 ms High freq mode = 100 ms Low Pass Filter status = disable Low Pass Filter signal width = 1 ms */ I8084W_API int pac_i8084W_ReadXorRegister(int Slot, int Channel, int *XorReg); /* Slot: 0~7 Channel: 0~7 *XorReg: 0 ==> Low active (signal from High to Low, count changed) 1 ==> High acitve (signal from Low to High, count changed) return 0 --> OK return others --> error codes */ I8084W_API int pac_i8084W_SetXorRegister(int Slot, int Channel, int XorReg); /* Slot: 0~7 Channel: 0~7 XorReg: 0 ==> Low active (signal from High to Low, count changed) 1 ==> High acitve (signal from Low to High, count changed) return: 0 ==> No error 1 ==> The Pulse/Dir counter has one count offset (+1) (due to the input channel is high) */ I8084W_API int pac_i8084W_ReadChannelMode(int Slot, int Channel, int *Mode); /* Slot: 0~7 Channel: 0~7 Mode: 0 --> Dir/Pulse Counter 1 --> Up/Down Counter 2 --> Frequency 3 --> Up Counter */ I8084W_API int pac_i8084W_ReadLowPassFilter_Us(int Slot, int Channel, unsigned int *Us); /* Read Low Pass Filter Slot: 0~7 Channel: 0~7 Us: 1~32767, pulse width, unit=0.001 ms */ I8084W_API int pac_i8084W_SetLowPassFilter_Us(int Slot, int Channel, unsigned int Us); /* Set Low Pass Filter Slot: 0~7 Channel: 0~7 Us: 1~32767, pulse width, unit=micro second */ I8084W_API void pac_i8084W_ReadLowPassFilter_Status(int Slot,int Channel,int *Status); /* Slot: 0~7 Channel:0~7 Status: 0=disable 1=enable */ I8084W_API void pac_i8084W_SetLowPassFilter_Status(int Slot,int Channel,int Status); /* Slot: 0~7 Channel:0~7 Status: 0=disable 1=enable */ I8084W_API void pac_i8084W_ReadFreqMode(int Slot, int Channel, int *Mode); /* Slot: 0~7 Channel: 0~7 *Mode: 0=Auto 1=Low Frequency 2=High Frequency */ I8084W_API void pac_i8084W_SetFreqMode(int Slot, int Channel, int Mode); /* Slot: 0~7 Channel: 0~7 Mode: 0=Auto 1=Low Frequency 2=High Frequency */ I8084W_API unsigned short pac_i8084W_ReadFreqTimeoutValue(int Slot, int Channel ); I8084W_API void pac_i8084W_SetFreqTimeoutValue(int Slot, int Channel, unsigned short TimeOutValue ); //=================================================================== //===== Other Functions ============================================= //=================================================================== I8084W_API int pac_i8084W_ReadDI_Xor(int Slot, int *DI); /* Slot: 0~7 *DI: Bit0 = DI of A0 after XorControl *DI: Bit1 = DI of B0 after XorControl ... *DI: Bit7 = DI of B3 after XorControl return = 0 --> OK <> 0 --> error codes */ I8084W_API int pac_i8084W_ReadDI_XorLPF(int Slot, int *DI); /* Slot: 0~7 *DI: Bit0 = DI of A0 after XorControl & Low Pass Filter *DI: Bit1 = DI of B0 after XorControl & Low Pass Filter ... *DI: Bit7 = DI of B3 after XorControl & Low Pass Filter return = 0 --> OK <> 0 --> error codes */ I8084W_API int pac_i8084W_SetEdgeDetectMode(int Slot, int Channel, int EdgeMode); I8084W_API int pac_i8084W_GetEdgeDetectMode(int Slot, int Channel, int* EdgeMode); I8084W_API int pac_i8084W_EepWriteWord(int Slot, int Addr, int Value); I8084W_API int pac_i8084W_EepReadWord(int Slot, int Addr, int *Value); #ifdef __cplusplus } #endif /* __cplusplus */